An altered PWM strategy for overmodulation operation of three-level NPC inverter with capacitor voltage balancing

Abstract

A pulse width modulation (PWM) strategy for operation of three-level neutral-point-clamped (NPC) inverter in the full modulation range including overmodulation region with dc-link capacitor unbalance control is proposed. The overmodulation signals are derived in a simple and generalized way by properly adding a bias signal with the zero sequence injected modulation signals. It has been shown that the incorporation of a signal compression factor creates a room for addition of a compensating offset signal of appropriate polarity which can be used to generate neutral current in the right direction to mitigate prior unbalance in two dc-link capacitor voltages in the overmodulation region. A detailed study of the PWM algorithm for operation in both undermodulation and overmodulation region with capacitor voltage balancing strategy is carried out. The performances of the proposed scheme is evaluated through simulation and validated in experiments using a prototype three-level NPC inverter.