A 1.8 GHz CMOS fractional-N frequency synthesizer with randomized multi-phase VCO

Abstract

A synthesizer in 0.6 /spl mu/m CMOS with an on-chip multiphase VCO exhibits no spurs resulting from interpolated phase errors. The proposed architecture randomizes phase errors of the multi-phase VCO to eliminate spurious tones generated by phase mismatch. Phase noise measured at 1.715 GHz is lower than -80 dBc within 20 kHz loop bandwidth and -118 dBc at 1 MHz offset with fractional spur below -70 dBc. The chip consumes 140 mW at 3.3 V and occupies 3.7 mm/spl times/4.6 mm.