Design and implementation of an all-analog fast-fourier transform processor

K. Boyle, P. Mercier, N. Sadeghi, V. Gaudet, C. Schlegel, C. Winstead, M. Kashyap
{"title":"Design and implementation of an all-analog fast-fourier transform processor","authors":"K. Boyle, P. Mercier, N. Sadeghi, V. Gaudet, C. Schlegel, C. Winstead, M. Kashyap","doi":"10.1109/MWSCAS.2007.4488832","DOIUrl":null,"url":null,"abstract":"The implementation of a 64-symbol analog, current-mode FFT processor is discussed. An analog FFT would be suitable for combination with an analog decoder in the making of an all-analog communication front-end for OFDM systems. Here the FFT is implemented using a butterfly diagram as the system block diagram; each node in the diagram is implemented using analog circuits. Implementation details, including consideration of the effect of approximation errors and the implementation of a test chip, are discussed.","PeriodicalId":256061,"journal":{"name":"2007 50th Midwest Symposium on Circuits and Systems","volume":"91 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 50th Midwest Symposium on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2007.4488832","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14

Abstract

The implementation of a 64-symbol analog, current-mode FFT processor is discussed. An analog FFT would be suitable for combination with an analog decoder in the making of an all-analog communication front-end for OFDM systems. Here the FFT is implemented using a butterfly diagram as the system block diagram; each node in the diagram is implemented using analog circuits. Implementation details, including consideration of the effect of approximation errors and the implementation of a test chip, are discussed.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
全模拟快速傅立叶变换处理器的设计与实现
讨论了一个64符号模拟电流模式FFT处理器的实现。模拟FFT将适合与模拟解码器组合,以制造OFDM系统的全模拟通信前端。这里FFT是用蝴蝶图作为系统框图来实现的;图中的每个节点都是用模拟电路实现的。讨论了实现细节,包括考虑近似误差的影响和测试芯片的实现。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Image coding based on regular cosine-modulated filter banks Low power interference-robust UWB Low Noise Amplifier in 0.18-μm CMOS technology Constraint-based verification of delta-sigma modulators using interval analysis Efficient simulation of jitter tolerance for all-digital data recovery circuits On the theoretical limits of noise-gain-mismatch tradeoff in the design of multi-stage cascaded transistor amplifiers
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1