A high performance, high density sea of modules FPGA architecture

Abstract

Functionality and flexibility has been significantly enhanced with this novel sea of modules FPGA architecture. It includes a new improved logic cell, high performance interconnect architecture and full featured fracturable flip flops. The architecture is designed for high in system performance as well as low cost user programmable implementations. A flexible high performance I/O architecture complements the architecture with high performance input/output delays. A modular architecture and design methodology allows quick proliferation to multiple families while tailoring the individual family characteristics to quickly serve a particular market segment. The family uses a novel metal to metal antifuse technology that affords high performance, scalability and cost reduction.