{"title":"Power Integrity Analysis for High Current Digital Core & DDR Power and PDN Noise Impact on the LpDDR4 Timing Analysis for ADAS Automotive Application","authors":"Harini Manoharan, Frank Ebert","doi":"10.1109/SPI57109.2023.10145552","DOIUrl":null,"url":null,"abstract":"Power Distribution Networks (PDNs) in high-speed applications are very important for proper functioning of the IC's. In this paper, the impact of VRM, PCB, IC package and DIE parasitic on PDN is analyzed and how to optimize the PCB in order to achieve the target impedance for high current requirements. The holistic signal integrity approach of considering the coupling of DDR power noise on the parallel interface, affecting the timing and eye quality is studied.","PeriodicalId":281134,"journal":{"name":"2023 IEEE 27th Workshop on Signal and Power Integrity (SPI)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2023-05-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE 27th Workshop on Signal and Power Integrity (SPI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPI57109.2023.10145552","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Power Distribution Networks (PDNs) in high-speed applications are very important for proper functioning of the IC's. In this paper, the impact of VRM, PCB, IC package and DIE parasitic on PDN is analyzed and how to optimize the PCB in order to achieve the target impedance for high current requirements. The holistic signal integrity approach of considering the coupling of DDR power noise on the parallel interface, affecting the timing and eye quality is studied.
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