Towards a graphics/procedural environment for constructing VLSI module generators

Abstract

New techniques for improving the productivity and working environment of designers who use procedural layout techniques for implementing VLSI module generators are described. APL and C, as examples of interpreted and compiled languages, can be interfaced to an advanced graphics display system in such a way that the tediousness associated with coordinate entry and referencing is removed. Designers can procedurally define arbitrarily complex objects, such as decoders, memory arrays, barrel shifters, etc., by interactively stitching primitive objects and cells together using a new path-forming primitive called a trail.<>