{"title":"PHIGURE: a parallel hierarchical global router","authors":"Randall J. Brouwer, P. Banerjee","doi":"10.1145/123186.123429","DOIUrl":null,"url":null,"abstract":"A new parallel hierarchical algorithm for global routing (PHIGURE) is presented. The router is based on the work of M. Burstein and R. Pelavin, (IEEE Trans. CAD, vol.CAD-2, no.4, p.223-34, Oct. 1983) but has many extensions for general global routing and parallel execution. Main features of the algorithm include structured hierarchical decomposition into separate independent tasks which are suitable for parallel execution and adaptive simplex solution for adding feedthroughs and adjusting channel heights for row-based layout. The algorithm is described and results are presented for a shared-memory multiprocessor implementation.<<ETX>>","PeriodicalId":118552,"journal":{"name":"27th ACM/IEEE Design Automation Conference","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"30","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"27th ACM/IEEE Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/123186.123429","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 30
Abstract
A new parallel hierarchical algorithm for global routing (PHIGURE) is presented. The router is based on the work of M. Burstein and R. Pelavin, (IEEE Trans. CAD, vol.CAD-2, no.4, p.223-34, Oct. 1983) but has many extensions for general global routing and parallel execution. Main features of the algorithm include structured hierarchical decomposition into separate independent tasks which are suitable for parallel execution and adaptive simplex solution for adding feedthroughs and adjusting channel heights for row-based layout. The algorithm is described and results are presented for a shared-memory multiprocessor implementation.<>