A 2.5 V temperature compensated CMOS logarithmic amplifier

Proceedings of CICC 97 - Custom Integrated Circuits Conference Pub Date : 1997-05-05 DOI:10.1109/CICC.1997.606589

K. Koli, K. Halonen

引用次数: 21

Abstract

A new temperature compensated low voltage current-mode CMOS logarithmic amplifier is presented. The logarithmic amplifier uses seven cascaded limiting current amplifiers for piece-wise approximation of the logarithmic function and a current peak detector for detecting signal amplitude with a dynamic range of 60 dB. The circuit uses a current reference to stabilize the temperature dependencies down to /spl plusmn/1 dB. The designed amplifier is fabricated with a 1.2 /spl mu/m CMOS process. It operates with down to a 2.2 V single supply voltage and the power consumption is 3 mW with a 2.5 V supply.

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

2.5 V温度补偿CMOS对数放大器

提出了一种新型的温度补偿型低压电流型CMOS对数放大器。对数放大器使用七个级联的限制电流放大器来分段逼近对数函数，并使用一个电流峰值检测器来检测动态范围为60 dB的信号幅度。该电路使用电流基准来稳定温度依赖关系，降低到/spl plusmn/ 1db。所设计的放大器采用1.2 /spl μ m CMOS工艺制作。它在低至2.2 V的单电源电压下工作，功耗为3 mW, 2.5 V电源。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文去求助

来源期刊

Proceedings of CICC 97 - Custom Integrated Circuits Conference

自引率

0.00%

发文量

期刊最新文献

DFT for embedded charge-pump PLL systems incorporating IEEE 1149.1 Self-calibration of digital phase-locked loops Multi-layer over-the-cell routing with obstacles A 2.4 V, 700 /spl mu/W, 0.18 mm/sup 2/ second-order demodulator for high-resolution /spl Sigma//spl Delta/ DACs A single-chip controller for 1.2 Gbps shared buffer ATM switches