CAMEL: An Efficient Fault Simulator with Coupling Fault Simulation Enhancement for CAMs

Hsiang-Huang Wu, Jin-Fu Li, Chi-Feng Wu, Cheng-Wen Wu
{"title":"CAMEL: An Efficient Fault Simulator with Coupling Fault Simulation Enhancement for CAMs","authors":"Hsiang-Huang Wu, Jin-Fu Li, Chi-Feng Wu, Cheng-Wen Wu","doi":"10.1109/ATS.2007.27","DOIUrl":null,"url":null,"abstract":"Content addressable memories (CAMs) are widely used in digital systems. A test algorithm for CAMs must be able to cover the random access memory (RAM) faults and comparison faults. However, CAM circuits are usually customized for different products, so there are no standard tests, i.e., tests should be adapted to a specific design manufactured using specific technology. This paper presents a fault simulator, called CAM Evaluation tooL (CAMEL), for the evaluation of fault coverage of CAM test algorithms. It supports five common functional outputs, i.e., Data I/O, hit, multi-hit, matchout, and priority address for various CAM specifications. Since coupling fault simulation dominates the efficiency of a memory fault simulator, a concept of observability is proposed to simplify the coupling fault behavior. By exploiting the observability, a compression technique is also proposed to speed up the fault simulation and reduce memory usage. CAMEL can support both RAM faults and comparison faults. We have demonstrated the CAMEL using widely-used March tests and CAM tests. Simulation results show that the CAMEL can evaluate the fault coverage of tests accurately and efficiently.","PeriodicalId":289969,"journal":{"name":"16th Asian Test Symposium (ATS 2007)","volume":"624 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"16th Asian Test Symposium (ATS 2007)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.2007.27","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

Content addressable memories (CAMs) are widely used in digital systems. A test algorithm for CAMs must be able to cover the random access memory (RAM) faults and comparison faults. However, CAM circuits are usually customized for different products, so there are no standard tests, i.e., tests should be adapted to a specific design manufactured using specific technology. This paper presents a fault simulator, called CAM Evaluation tooL (CAMEL), for the evaluation of fault coverage of CAM test algorithms. It supports five common functional outputs, i.e., Data I/O, hit, multi-hit, matchout, and priority address for various CAM specifications. Since coupling fault simulation dominates the efficiency of a memory fault simulator, a concept of observability is proposed to simplify the coupling fault behavior. By exploiting the observability, a compression technique is also proposed to speed up the fault simulation and reduce memory usage. CAMEL can support both RAM faults and comparison faults. We have demonstrated the CAMEL using widely-used March tests and CAM tests. Simulation results show that the CAMEL can evaluate the fault coverage of tests accurately and efficiently.
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CAMEL:一种高效的CAMs耦合故障仿真器
内容寻址存储器(CAMs)在数字系统中有着广泛的应用。cam的测试算法必须能够覆盖随机存取存储器(RAM)故障和比较故障。然而,CAM电路通常是针对不同的产品定制的,因此没有标准测试,也就是说,测试应该适应使用特定技术制造的特定设计。本文提出了一个故障模拟器,称为CAM评估工具(CAMEL),用于评估CAM测试算法的故障覆盖率。它支持五种常见的功能输出,即数据I/O,命中,多命中,匹配和优先地址,用于各种CAM规格。考虑到耦合故障仿真对内存故障仿真效率的影响,提出了可观察性的概念来简化耦合故障行为。利用可观察性,提出了一种压缩技术,提高了故障模拟的速度,减少了内存的使用。CAMEL可以同时支持RAM故障和比较故障。我们使用广泛使用的March测试和CAM测试演示了CAMEL。仿真结果表明,该方法能够准确有效地评估测试的故障覆盖率。
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