{"title":"Systematic deletion/insertion error correcting codes with random error correction capability","authors":"K. Saowapa, H. Kaneko, E. Fujiwara","doi":"10.1109/DFTVS.1999.802895","DOIUrl":null,"url":null,"abstract":"This paper presents a class of binary block codes capable of correcting single synchronization error and single reversal error with fewer check bits than the existing codes. This also shows a decoding circuit and analyzes its complexity.","PeriodicalId":448322,"journal":{"name":"Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99)","volume":"34 5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFTVS.1999.802895","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16
Abstract
This paper presents a class of binary block codes capable of correcting single synchronization error and single reversal error with fewer check bits than the existing codes. This also shows a decoding circuit and analyzes its complexity.
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