A neural inverse function for automatic test pattern generation using strictly digital neural networks

Abstract

Presents a new method using 'k-out-of-n' design rule for neural networks to find out sets of diagnostic patterns to test VLSI circuits. The authors have already introduced a former method using neural logic gate to be mapped into real circuits directly, although the method needs a large number of neurons. In order to reduce the total number of neurons and computing cost, they propose a neural function called NIF, neural inverse function, for ATPG, automatic test pattern generation. A NIF is defined as a Boolean product form of sums. Simulation results of n-bit full-adder circuits show that the computational order of ATPG is approximately O(n/sup 0.5/) in parallel convergence, and O(n/sup 0.9/) in sequential. Compared with the former method, the new method is able to find a set of test patterns about n times faster than the former method, because NIF method needs a small amount of neurons.<>