{"title":"A dual-mode DC/DC converter for ultra-low-voltage microcontrollers","authors":"J. De Vos, D. Flandre, D. Bol","doi":"10.1109/SUBVT.2012.6404306","DOIUrl":null,"url":null,"abstract":"Ultra-low-voltage processors of highly duty-cycled applications such as wireless sensor nodes must support two modes of operation: active mode and sleep mode. Even in sleep mode some critical blocks such as retentive SRAM, timer and interrupt controller must remain powered-on. The DC/DC converter thus need to be able to supply ultra-low loads corresponding to sleep mode. In this paper, we propose a dual-mode switched-capacitor DC/DC converter to power such ultra-low-voltage processors with high efficiencies in both modes. It delivers a 0.3-0.4V output voltage from a 1-1.2V input source. The 0.12mm2 chip was manufactured in a 0.13μm CMOS technology. The efficiency reaches 74% with a 100 μW load and 63% with a 100nW load, corresponding to the processor active and sleep mode respectively. Adaptive body biasing and adaptive internal clock generation supplied by the output voltage allow the converter to correctly operate over a wide load range from 25nW to 125 μW, i.e. nearly 4 orders of magnitude.","PeriodicalId":383826,"journal":{"name":"2012 IEEE Subthreshold Microelectronics Conference (SubVT)","volume":"395 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE Subthreshold Microelectronics Conference (SubVT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SUBVT.2012.6404306","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
Ultra-low-voltage processors of highly duty-cycled applications such as wireless sensor nodes must support two modes of operation: active mode and sleep mode. Even in sleep mode some critical blocks such as retentive SRAM, timer and interrupt controller must remain powered-on. The DC/DC converter thus need to be able to supply ultra-low loads corresponding to sleep mode. In this paper, we propose a dual-mode switched-capacitor DC/DC converter to power such ultra-low-voltage processors with high efficiencies in both modes. It delivers a 0.3-0.4V output voltage from a 1-1.2V input source. The 0.12mm2 chip was manufactured in a 0.13μm CMOS technology. The efficiency reaches 74% with a 100 μW load and 63% with a 100nW load, corresponding to the processor active and sleep mode respectively. Adaptive body biasing and adaptive internal clock generation supplied by the output voltage allow the converter to correctly operate over a wide load range from 25nW to 125 μW, i.e. nearly 4 orders of magnitude.