S. Parthasarathy, J. Salcedo, A. Jeffry, R. Gobbi, J. Hajjar
{"title":"Design of ESD protection for fault tolerant interface applications with EMC immunity","authors":"S. Parthasarathy, J. Salcedo, A. Jeffry, R. Gobbi, J. Hajjar","doi":"10.1109/EOSESD.2016.7592549","DOIUrl":null,"url":null,"abstract":"A protection circuit for larger than 80 V operation and bidirectional blocking capability is introduced. This circuit achieves a required 8,000 V HBM robustness level, a holding voltage larger than 80 V, a reverse blocking voltage higher than -20 V and 18 dBm Direct RF Power Injection (DPI) immunity between 5- to 500-MHz.","PeriodicalId":239756,"journal":{"name":"2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EOSESD.2016.7592549","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A protection circuit for larger than 80 V operation and bidirectional blocking capability is introduced. This circuit achieves a required 8,000 V HBM robustness level, a holding voltage larger than 80 V, a reverse blocking voltage higher than -20 V and 18 dBm Direct RF Power Injection (DPI) immunity between 5- to 500-MHz.