Pub Date : 2016-09-11DOI: 10.1109/EOSESD.2016.7592563
F. Escudié, F. Caignet, N. Nolhier, M. Bafleur
Transient simulation is a main challenge to achieve system level ESD failure prediction. During the turn-on of the protections, complex phenomena introduce complex transient behaviors. In this paper we investigate the parameters that have to be added to perform accurate transient simulations and we propose a methodology to extract them by measurements.
{"title":"From quasi-static to transient system level ESD simulation: Extraction of turn-on elements","authors":"F. Escudié, F. Caignet, N. Nolhier, M. Bafleur","doi":"10.1109/EOSESD.2016.7592563","DOIUrl":"https://doi.org/10.1109/EOSESD.2016.7592563","url":null,"abstract":"Transient simulation is a main challenge to achieve system level ESD failure prediction. During the turn-on of the protections, complex phenomena introduce complex transient behaviors. In this paper we investigate the parameters that have to be added to perform accurate transient simulations and we propose a methodology to extract them by measurements.","PeriodicalId":239756,"journal":{"name":"2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120962478","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-09-01DOI: 10.1109/EOSESD.2016.7592553
G. Langguth, A. Ille
A SPICE based simulation flow is proposed for ESD verification in standard analog simulation environment. Models contain ESD specific sub-circuits and failure thresholds which are activated on demand. Good agreement with experimental data is proven including bipolar operation and the triggering of parasitic paths. The flow has been successfully tested on real designs.
{"title":"Spice modelling flow for ESD simulation of CMOS ICs","authors":"G. Langguth, A. Ille","doi":"10.1109/EOSESD.2016.7592553","DOIUrl":"https://doi.org/10.1109/EOSESD.2016.7592553","url":null,"abstract":"A SPICE based simulation flow is proposed for ESD verification in standard analog simulation environment. Models contain ESD specific sub-circuits and failure thresholds which are activated on demand. Good agreement with experimental data is proven including bipolar operation and the triggering of parasitic paths. The flow has been successfully tested on real designs.","PeriodicalId":239756,"journal":{"name":"2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122443201","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-09-01DOI: 10.1109/EOSESD.2016.7592528
A. Mishra, M. Shrivastava
We present unique physics of ESD current transport through Multi-wall Carbon Nanotubes. Role of substrate, CNT shells and sub-bands in ESD current conduction is highlighted. The quantum electron-phonon transport under non-equilibrium (ESD) conditions is explained using CNT band structure and interplay between electrical and thermal transport along the nanotube.
{"title":"Unique current conduction mechanism through multi wall CNT interconnects under ESD conditions","authors":"A. Mishra, M. Shrivastava","doi":"10.1109/EOSESD.2016.7592528","DOIUrl":"https://doi.org/10.1109/EOSESD.2016.7592528","url":null,"abstract":"We present unique physics of ESD current transport through Multi-wall Carbon Nanotubes. Role of substrate, CNT shells and sub-bands in ESD current conduction is highlighted. The quantum electron-phonon transport under non-equilibrium (ESD) conditions is explained using CNT band structure and interplay between electrical and thermal transport along the nanotube.","PeriodicalId":239756,"journal":{"name":"2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127012681","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-09-01DOI: 10.1109/EOSESD.2016.7592561
Jian-Hsing Lee, N. M. Iyer, Haojun Zhang, M. Prabhu, Patrick Cao Li, Guowei Zhang, T. Tsai
The fundamental physical mechanism decreasing transistor SOA boundary and ID with the increasing transistor total width is identified and reported for the first time. The skin effect, proximity and Hall-effect arising from the large varying-current are attributed to transistor SOA degradation.
{"title":"Physics of SOA degradation phenomena in power transistors under ESD conditions","authors":"Jian-Hsing Lee, N. M. Iyer, Haojun Zhang, M. Prabhu, Patrick Cao Li, Guowei Zhang, T. Tsai","doi":"10.1109/EOSESD.2016.7592561","DOIUrl":"https://doi.org/10.1109/EOSESD.2016.7592561","url":null,"abstract":"The fundamental physical mechanism decreasing transistor SOA boundary and ID with the increasing transistor total width is identified and reported for the first time. The skin effect, proximity and Hall-effect arising from the large varying-current are attributed to transistor SOA degradation.","PeriodicalId":239756,"journal":{"name":"2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131132643","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-09-01DOI: 10.1109/EOSESD.2016.7592564
Suyu Yang, Benjamin J. Orr, D. Pommerenke, H. Shumiya, J. Maeshima, Taketoshi Sekine, Y. Takita, K. Araki
In this paper a method for separating local soft-failures from distant errors related to noise on the power distribution network (PDN) is demonstrated. Two approaches are used which duplicate the noise on a PDN caused by some intentional injection onto a second system where the intentional injection is not present.
{"title":"Mirrored power distribution network noise injection for soft failure root cause analysis","authors":"Suyu Yang, Benjamin J. Orr, D. Pommerenke, H. Shumiya, J. Maeshima, Taketoshi Sekine, Y. Takita, K. Araki","doi":"10.1109/EOSESD.2016.7592564","DOIUrl":"https://doi.org/10.1109/EOSESD.2016.7592564","url":null,"abstract":"In this paper a method for separating local soft-failures from distant errors related to noise on the power distribution network (PDN) is demonstrated. Two approaches are used which duplicate the noise on a PDN caused by some intentional injection onto a second system where the intentional injection is not present.","PeriodicalId":239756,"journal":{"name":"2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121859410","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-09-01DOI: 10.1109/EOSESD.2016.7592524
S. Fujiwara, R. Burton
ESD robustness enhancement study of an 800V JFET including the SCR structure is conducted. A p+ ballast structure is introduced in the device and ESD robustness improvement is demonstrated with 3D TCAD simulations. Based on the TCAD study results, a ballasted device is fabricated and improved ESD performance is successfully obtained.
{"title":"ESD robust 800V SCR-JFET with p+ ballast structure","authors":"S. Fujiwara, R. Burton","doi":"10.1109/EOSESD.2016.7592524","DOIUrl":"https://doi.org/10.1109/EOSESD.2016.7592524","url":null,"abstract":"ESD robustness enhancement study of an 800V JFET including the SCR structure is conducted. A p+ ballast structure is introduced in the device and ESD robustness improvement is demonstrated with 3D TCAD simulations. Based on the TCAD study results, a ballasted device is fabricated and improved ESD performance is successfully obtained.","PeriodicalId":239756,"journal":{"name":"2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124833858","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-09-01DOI: 10.1109/EOSESD.2016.7592537
Junsik Park, Jong-Sung Lee, Seongmoo Kim, Cheolgu Jo, Byongsu Seol, Jingook Kim
The discharging currents through an IC induced by the charged board event (CBE) is measured using a shielded Rogowski coil. Several shielding techniques are applied in the measurement to reduce the common mode noise and the unexpected electric field coupling. The measured results are validated with the CBE circuit simulations.
{"title":"Measurement of discharging currents through an IC due to the charged board event using a shielded Rogowski coil","authors":"Junsik Park, Jong-Sung Lee, Seongmoo Kim, Cheolgu Jo, Byongsu Seol, Jingook Kim","doi":"10.1109/EOSESD.2016.7592537","DOIUrl":"https://doi.org/10.1109/EOSESD.2016.7592537","url":null,"abstract":"The discharging currents through an IC induced by the charged board event (CBE) is measured using a shielded Rogowski coil. Several shielding techniques are applied in the measurement to reduce the common mode noise and the unexpected electric field coupling. The measured results are validated with the CBE circuit simulations.","PeriodicalId":239756,"journal":{"name":"2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","volume":"521 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123061581","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-09-01DOI: 10.1109/EOSESD.2016.7592566
Benjamin J. Orr, K. Domanski, H. Gossner, D. Pommerenke
In this paper, the interaction between the ESD protection concept and a powered output driver in a 40 nm CMOS process are investigated and characterized by TLP. By using IO test chips designed for HBM and CDM validation, the IV behavior of the pin is measured with the driver placed into various states.
{"title":"TLP IV characterization of a 40 nm CMOS IO protection concept in the powered state","authors":"Benjamin J. Orr, K. Domanski, H. Gossner, D. Pommerenke","doi":"10.1109/EOSESD.2016.7592566","DOIUrl":"https://doi.org/10.1109/EOSESD.2016.7592566","url":null,"abstract":"In this paper, the interaction between the ESD protection concept and a powered output driver in a 40 nm CMOS process are investigated and characterized by TLP. By using IO test chips designed for HBM and CDM validation, the IV behavior of the pin is measured with the driver placed into various states.","PeriodicalId":239756,"journal":{"name":"2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124531312","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-09-01DOI: 10.1109/EOSESD.2016.7592538
Yang Xiu, F. Farbiz, A. Salman, Y. Zu, M. Dissegna, G. Boselli, E. Rosenbaum
This paper presents a case study to demonstrate that transient-triggered ESD protection circuits may fail the DPI automotive requirement. A novel scheme is devised to improve the DPI performance of a MOSSCR protection device while maintaining the system-level ESD performance.
{"title":"Case study of DPI robustness of a MOS-SCR structure for automotive applications","authors":"Yang Xiu, F. Farbiz, A. Salman, Y. Zu, M. Dissegna, G. Boselli, E. Rosenbaum","doi":"10.1109/EOSESD.2016.7592538","DOIUrl":"https://doi.org/10.1109/EOSESD.2016.7592538","url":null,"abstract":"This paper presents a case study to demonstrate that transient-triggered ESD protection circuits may fail the DPI automotive requirement. A novel scheme is devised to improve the DPI performance of a MOSSCR protection device while maintaining the system-level ESD performance.","PeriodicalId":239756,"journal":{"name":"2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127297165","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-09-01DOI: 10.1109/EOSESD.2016.7592552
M. Khazhinsky, K. Domanski, Guido Quax, Scott Ruth, F. Farbiz, N. Trivedi, H. Gossner
In this paper we review latchup protection verification methods and EDA challenges. We demonstrate complex static and transient latchup scenarios requiring advanced connectivity analysis. Using various EDA verification flows and tools we study latchup problems associated with grounded n-wells, biased n-wells and parasitic thyristors formed during ESD events.
{"title":"EDA approaches in identifying latchup risks","authors":"M. Khazhinsky, K. Domanski, Guido Quax, Scott Ruth, F. Farbiz, N. Trivedi, H. Gossner","doi":"10.1109/EOSESD.2016.7592552","DOIUrl":"https://doi.org/10.1109/EOSESD.2016.7592552","url":null,"abstract":"In this paper we review latchup protection verification methods and EDA challenges. We demonstrate complex static and transient latchup scenarios requiring advanced connectivity analysis. Using various EDA verification flows and tools we study latchup problems associated with grounded n-wells, biased n-wells and parasitic thyristors formed during ESD events.","PeriodicalId":239756,"journal":{"name":"2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121861625","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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