Quantum Cost Optimized Design of Reversible 2's Complement Code Converter

H. Maity, A. Biswas, Anita Pal, A. Bhattacharjee
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引用次数: 1

Abstract

In this paper, we have proposed a quantum cost optimized reversible 2's complement code converter (2SCCC) circuit using existing reversible logic gate. First, we have design a reversible controlled inverter using Feynman gate and then we have design the proposed code converter (2SCCC) circuit using Feynman gate and Peres gate. Finally, we have proposed the design of quantum cost optimized reversible 2's complement code converter. The quantum cost (QC), garbage output (GO), delay and constant input (CI) of the proposed 2's complement code converter circuits are 11, 1, 7 and 1 which is better w. r. t. previously reported results. The improvement % of quantum cost, garbage outputs, delay and constant inputs are 26.66 - 60.71 %, 0 - 92.3 %, 25 - 57.14 % and 0 - 83.33 %.
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可逆2补码转换器的量子成本优化设计
本文利用现有的可逆逻辑门,提出了一种量子成本优化的可逆2's补码转换器(2SCCC)电路。首先,我们使用费曼门设计了一个可逆控制逆变器,然后我们使用费曼门和佩雷斯门设计了所提出的代码转换器(2SCCC)电路。最后,我们提出了量子成本优化可逆2补码转换器的设计。所提出的补码转换电路的量子成本(QC)、垃圾输出(GO)、时延(delay)和恒定输入(CI)分别为11、1、7和1,与已有报道的结果相比,具有更好的性能。量子成本、垃圾输出、延迟和常数输入的改善率分别为26.66 ~ 60.71%、0 ~ 92.3%、25 ~ 57.14%和0 ~ 83.33%。
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