Multi-dimensional subsystem-dividing for yield enhancement in defect-tolerant WSI systems

Abstract

In designing defect-tolerant WSI systems, introducing subsystem-dividing in which an overall system is divided into subsystems and defect recovery is performed for every subsystem, results in reduced chip area of redundant interconnection lines and reduced delay time through redundant interconnection lines. On the other hand, subsystem-dividing results in reduced defect recovery ability. This paper presents a novel subsystem-dividing method called "the multi-dimensional subsystem-dividing", in which a system is divided into subsystems in multiple dimensions, i.e. multiple directions intersecting each other. Since spare circuits from different directions can be provided to an area, the defect recovery ability of WSI systems under the presented method can be improved, i.e. the yield of the system can be enhanced to a greater extent than conventional subsystem-dividing which is single dimensional.