Clock cycle estimations for future microprocessor generations

Abstract

In the past 50 years, the semiconductor industry has experienced unprecedented growth. Identifying pivotal factors and technology trends in future generations will be key to understanding how we can maintain the historical growth and improve customer value. Processor performance will be one of the essential factors in this quest. This paper presents a high-level model of microprocessor clock-cycle performance. The model considers the impact of interconnect technology, device and circuit technology, along with architectural and physical design factors, to estimate clock speeds of future microprocessors.