{"title":"Impact of different ground planes of UTBB SOI MOSFETs under the single-gate (SG) and double-gate (DG) operation mode","authors":"N. Othman, M. Arshad, S. Hashim","doi":"10.1109/SMELEC.2014.6920802","DOIUrl":null,"url":null,"abstract":"In this work, we investigate the impact of different ground planes of UTBB SOI MOSFETs under the single-gate (SG) and double-gate (DG) operation modes by numerical simulations. Simulations were performed for 10 nm gate length UTBB SOI MOSFET of 7 nm thin body (Tsi) and 10 nm thin buried oxide (TBOX) for Vd = 20 mV and 1.0 V. For DG operation mode, the back-gate (BG) and front-gate (FG) were swept simultaneously from 0 to 1.5 V with 10 mV incremental steps. Results reported are on key device parameters such as the threshold voltage (Vth), drain induced barrier lowering (DIBL), drive current (Ion), subthreshold swing (SS) and transconductance (gm). Ground Plane (GP) - B structure which employed a p+ doping under the channel shows the best results under the DG operation mode in terms of the lowest DIBL and SS. However, it recorded a slightly higher Vth while the results of Ion and gm are comparable with its other GP counterparts.","PeriodicalId":268203,"journal":{"name":"2014 IEEE International Conference on Semiconductor Electronics (ICSE2014)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE International Conference on Semiconductor Electronics (ICSE2014)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMELEC.2014.6920802","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
In this work, we investigate the impact of different ground planes of UTBB SOI MOSFETs under the single-gate (SG) and double-gate (DG) operation modes by numerical simulations. Simulations were performed for 10 nm gate length UTBB SOI MOSFET of 7 nm thin body (Tsi) and 10 nm thin buried oxide (TBOX) for Vd = 20 mV and 1.0 V. For DG operation mode, the back-gate (BG) and front-gate (FG) were swept simultaneously from 0 to 1.5 V with 10 mV incremental steps. Results reported are on key device parameters such as the threshold voltage (Vth), drain induced barrier lowering (DIBL), drive current (Ion), subthreshold swing (SS) and transconductance (gm). Ground Plane (GP) - B structure which employed a p+ doping under the channel shows the best results under the DG operation mode in terms of the lowest DIBL and SS. However, it recorded a slightly higher Vth while the results of Ion and gm are comparable with its other GP counterparts.