Survey of low power techniques for ROMs

Edwin de Angel, E. Swartzlander
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引用次数: 41

Abstract

This paper presents a survey of low power techniques for Read Only Memories (ROMs). Significant savings in power dissipation are achieved through the use of techniques at the circuit and architecture level. The ROM circuits have been designed in O.35 /spl mu/m CMOS technology and simulated using PowerMill.
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rom低功耗技术综述
本文介绍了只读存储器(rom)的低功耗技术。通过在电路和架构级别使用技术,可以显著节省功耗。采用0.35 /spl μ m CMOS工艺设计了ROM电路,并用PowerMill进行了仿真。
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