A new CMOS double-upconverter with half-LO for DTV tuner

Abstract

A new CMOS Double-Upconverter (DUC) with half-LO for a DTV (Digital TV) tuner is proposed. It converts a wide-band input video RF signal spanning from 48 MHz to 810 MHz to an IF of 932 MHz with half local oscillator frequencies from 490 MHz to 871 MHz. The proposed architecture reduces the local oscillator frequency to half, which enables the integration on a single chip and reduces the overall power consumption. It also makes the image component low with its architectural property devised on the basis of the Weaver architecture. It is implemented with 0.8 /spl mu/m CMOS technology modified for RF applications.