{"title":"A 32b bus interface chip","authors":"R. Schumann, W. Parker","doi":"10.1109/ISSCC.1984.1156649","DOIUrl":null,"url":null,"abstract":"This report will cover a bus interface chip providing 600ns data access time, 13Mb bandwidth and error detection. The crip (265 × 265mils) is mounted in a 132 pin ceramic pin grid array and dissipates 3.5W.","PeriodicalId":260117,"journal":{"name":"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1984.1156649","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This report will cover a bus interface chip providing 600ns data access time, 13Mb bandwidth and error detection. The crip (265 × 265mils) is mounted in a 132 pin ceramic pin grid array and dissipates 3.5W.
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