Thermal Fatigue Analysis of Microbumps in a 3D TSV Integration Device

Abstract

Copper microbumps are generally used in three-dimensional (3D) through silicon vias (TSV) integration devices. Because the structure of 3D TSV integration is complex, the thermal fatigue of microbumps may take place due to higher stresses during thermal cycles. In this study, a typical 3D TSV integration was analyzed by finite element method to evaluate the thermal fatigue life of microbumps in different locations based on Coffin-Manson model. To keep the accuracy of analysis, the elastoplastic and Anand constitutive relationships were adopted for the copper microbumps and the micro solder balls, respectively. The results revealed that the critical microbump with lower fatigue life is under the memory module, and the microbumps under the peripheral chips have much better fatigue performance.