Yasuyuki Ookura, Nobuhiko Kato, Shin-ichiroh Kobayashi, T. Kuwabara, Masanori Harada, Kentaro Yamaguchi, H. Koike
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引用次数: 0
Abstract
A new 3-D TCAD system has been proposed aiming close coupling of first-principles calculator, process, and device simulators in response to requirements for ultra-small to high-power semiconductor devices. Using the first-principles calculator Schottky-barrier height has been derived. In the process simulator, a robust and high-speed topographical algorithm has been newly proposed and thus easier handling of complicated 3-D structure has been provided. And a 3-D effect due to arsenic deactivation has been demonstrated. In the device simulator, robust calculation for high-voltage breakdown characteristics of wide-gap devices has been demonstrated.
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