Digital calibration technique for subrange ADC based on SAR architecture

Abstract

A novel digital calibration technique to correct DAC errors from capacitor mismatch is presented in this paper. The jump height of transfer curve is measured for calibration and random interference introducing method helps to improve the measurement accuracy with seldom modification on analog circuits. An 11-bit 250Ms/s subrange ADC based on SAR architecture is designed to test this calibration technique. Simulation results show that significant improvements can be achieved with the proposed calibration technique.