N. Caglio, J. Degouy, D. Meignant, P. Rousseau, B. Leroux
{"title":"An integrated GaAs 1.25 GHz clock frequency FM-CW direct digital synthesizer","authors":"N. Caglio, J. Degouy, D. Meignant, P. Rousseau, B. Leroux","doi":"10.1109/GAAS.1993.394477","DOIUrl":null,"url":null,"abstract":"An integrated GaAs FM-CW direct digital synthesizer (DDS) has been developed using Philips Microwave Limeil (PML) standard ER07AD technology. The DDS is composed of two successive functional blocks: a double phase accumulator which produces the right synchronizing sequences and a digital to analog sine converter (DASC) which generates the linear chirp waveform. The double phase accumulator has been implemented with five chips while the DASC is monolithic. The maximum measured clock frequency on the phase accumulator is 1.25 GHz and the power consumption is 320 mW. For the DASC, the maximum measured clock frequency is 1.5 GHz and the associated consumption is 600 mW.<<ETX>>","PeriodicalId":347339,"journal":{"name":"15th Annual GaAs IC Symposium","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"15th Annual GaAs IC Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GAAS.1993.394477","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
An integrated GaAs FM-CW direct digital synthesizer (DDS) has been developed using Philips Microwave Limeil (PML) standard ER07AD technology. The DDS is composed of two successive functional blocks: a double phase accumulator which produces the right synchronizing sequences and a digital to analog sine converter (DASC) which generates the linear chirp waveform. The double phase accumulator has been implemented with five chips while the DASC is monolithic. The maximum measured clock frequency on the phase accumulator is 1.25 GHz and the power consumption is 320 mW. For the DASC, the maximum measured clock frequency is 1.5 GHz and the associated consumption is 600 mW.<>
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