Optimization of an MP3 decoder on the ARM processor

Abstract

MPEG-1/2 audio layer-3 (MP3) is the must popular format for playback of high quality compressed audio for portable devices such as audio players and mobile phones. Typically these devices are based on either DSP or RISC processors. While the DSP architecture is more efficient for implementing the MP3 algorithm, the challenges a RISC implementation are lesser understood. This paper describes the challenges and optimization techniques useful for implementing the MP3 decoder algorithm on the RISC-based ARM9TDMI processor. Some of these techniques are generic and hence applicable to the any audio codec implementation on RISC-based platforms. Our results, which are among the best in the industry, indicate that stereo MP3 at 44 kHz and 128 kbps can be decoded using 27 MIPS on the ARM9TDMI. In addition, the output of our decoder is fully bit-compliant with the standard on the ISO test vectors.