YNCC/sub DB/: a new database representation of VLSI circuits for fast navigation and layout verification applications

Abstract

A description is given of a database representation of VLSI circuits and the algorithms used to build and access it. Since the database is used in the layout verification process, it is being built from a flat (SPICE2-type) description of the circuit which is extracted from the layout masks. Other databases are built during the engineering process and usually rely on the hierarchy of the chip for partitioning purposes. The capability of partitioning a flat description and building a database from such a representation is the novel idea presented. The partitioning is performed by a graph algorithm which is superior to other algorithms in that it is technology-independent. A database organization is presented that achieves fast navigation capability by using architectural access methods such as rooms, floors, stairs, corridors, and hallways. The computational complexity of the partitioning algorithm, as well as the access time for a single device, is linear with the average number of devices connected to a single net. The database is used commercially as part of the YNCC network comparison program. Circuits in the 200 K-component range are considered.<>