Lower part OR based Approximate Multiplier for Error Resilient Applications

U. A. Kumar, Goli Naga Sandesh, Dhoti Ojusteja, Syed Ershad Ahmed
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Abstract

Inexact computation is used extensively in image processing applications especially in compact devices where battery (power consumption) and size (area) must be used efficiently. Inexact computation uses accuracy as a design specification to enhance our need for speed and performance with limited resources and time. This paper introduces a novel multiplier that aims to fulfill this need of high performance with minimal hardware. An error correcting module is introduced to improve the accuracy of the proposed multiplier. Experimental results are carried out resulting in an improvement of 30% power consumption with a reduction of 36% area when compared against existing multipliers with acceptable accuracy. A huge improvement in delay can also be observed as a direct consequence of the multiplier design structure.
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基于下半部分或近似乘法器的误差弹性应用
非精确计算在图像处理应用中被广泛使用,特别是在紧凑的设备中,必须有效地利用电池(功耗)和尺寸(面积)。不精确计算将准确性作为设计规范,以在有限的资源和时间内提高我们对速度和性能的需求。本文介绍了一种新的乘法器,旨在以最小的硬件满足这种高性能的需求。为了提高所提乘法器的精度,引入了误差校正模块。实验结果表明,与现有的乘法器相比,功耗提高30%,面积减少36%,精度可接受。作为乘法器设计结构的直接结果,也可以观察到延迟方面的巨大改进。
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