A fully-integrated 5 MHz-IF digital FM demodulator

Proceedings of CICC 97 - Custom Integrated Circuits Conference Pub Date : 1997-05-05 DOI:10.1109/CICC.1997.606681

Minyoung Song, Jaejin Park, Euro Joe, M. Choe, B. Song

引用次数: 1

Abstract

A 5 MHz-IF digital FM demodulator integrated with a 4th-order bandpass delta-sigma front-end exhibits 74.7 dB SNR, -80.7 dB THD, and 61 dB AM rejection within a 9 kHz message bandwidth. The 0.65 /spl mu/m CMOS chip occupies 3.5 mm/spl times/3.5 mm of active area and consumes 180 mW with 4 V supply and 20 MHz clock.

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全集成5mhz - if数字调频解调器

一个集成了4阶带通delta-sigma前端的5mhz - if数字调频解调器在9 kHz消息带宽内具有74.7 dB信噪比，-80.7 dB THD和61 dB AM抑制。0.65 /spl mu/m的CMOS芯片占用3.5 mm/spl倍/3.5 mm的有源面积，在4 V电源和20 MHz时钟下消耗180 mW。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Proceedings of CICC 97 - Custom Integrated Circuits Conference

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