A Technology Independent Block Extraction Algorithm

F. Luellau, T. Hoepken, E. Barke
{"title":"A Technology Independent Block Extraction Algorithm","authors":"F. Luellau, T. Hoepken, E. Barke","doi":"10.1109/DAC.1984.1585862","DOIUrl":null,"url":null,"abstract":"Functional block extraction is a useful tool for layout verification of integrated circuits. In particular, it facilitates the network comparison problem by transfering it to a higher level of hierarchy. This paper describes a computer program called BLEX (Block Extractor), which is able to extract any given circuit block, e.g., gates, flip-flops, memory cells, differential amplifiers, darlington circuits etc., from a SPICE-like network description. The algorithm is fully technology independent. The size of the blocks is not subject to any restrictions. Descriptions of the functional blocks having the same format as the network description are supplied by the user. The circuit to be examined results usually from a preceding circuit extraction. The extractor and BLEX are part of the layout verification system ALAS (A Layout Analysis System).","PeriodicalId":188431,"journal":{"name":"21st Design Automation Conference Proceedings","volume":"77 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1984-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"29","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"21st Design Automation Conference Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DAC.1984.1585862","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 29

Abstract

Functional block extraction is a useful tool for layout verification of integrated circuits. In particular, it facilitates the network comparison problem by transfering it to a higher level of hierarchy. This paper describes a computer program called BLEX (Block Extractor), which is able to extract any given circuit block, e.g., gates, flip-flops, memory cells, differential amplifiers, darlington circuits etc., from a SPICE-like network description. The algorithm is fully technology independent. The size of the blocks is not subject to any restrictions. Descriptions of the functional blocks having the same format as the network description are supplied by the user. The circuit to be examined results usually from a preceding circuit extraction. The extractor and BLEX are part of the layout verification system ALAS (A Layout Analysis System).
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
一种与技术无关的块提取算法
功能块提取是集成电路版图验证的有效工具。特别是,它通过将网络比较问题转移到更高的层次结构来简化网络比较问题。本文描述了一个名为BLEX (Block Extractor)的计算机程序,它能够从类似spice的网络描述中提取任何给定的电路块,例如门、触发器、存储单元、差分放大器、达林顿电路等。该算法完全独立于技术。块的大小不受任何限制。与网络描述格式相同的功能块描述由用户提供。要检查的电路通常是由先前的电路提取得到的结果。提取器和BLEX是布局验证系统ALAS (A layout Analysis system)的组成部分。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
The Engineering Design Environment IGES as an Interchange Format for Integrated Circuit Design Functional Testing Techniques for Digital LSI/VLSI Systems Functional Design Verification by Multi-Level Simulation Uniform Support for Information Handling and Problem Solving Required by the VLSI Design Process
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1