Low-cost test for large analog IC's

Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99) Pub Date : 1999-11-01 DOI:10.1109/DFTVS.1999.802875

S. Ozev, A. Orailoglu

引用次数: 2

Abstract

This paper outlines a basic block level test translation tool for analog systems. Test translation aims at minimizing DFT overhead in a hierarchical test translation scheme to meet the ever increasing integration, performance and test re-use requirements. The concept of analog signal propagation and necessary signal attributes are introduced to achieve effective and accurate test translation. A pre-analysis of the system to identify feasible paths and utilization of behavioral basic block models provide computational effectiveness. Experimental results show that test translation reduces DFT overhead significantly while satisfying coverage requirements.

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大型模拟IC的低成本测试

本文概述了一种用于模拟系统的基本块级测试翻译工具。测试转换的目标是在分层测试转换方案中最小化DFT开销，以满足不断增长的集成、性能和测试重用需求。介绍了模拟信号传播的概念和必要的信号属性，以实现有效、准确的测试转换。系统的预分析，以确定可行的路径和利用行为基本块模型提供计算效率。实验结果表明，测试翻译在满足覆盖要求的同时显著降低了DFT开销。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99)

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