D. Jung, Joohee Kim, Heegon Kim, J. J. Kim, Joungho Kim, J. Pak, J. Yook, J. C. Kim
{"title":"Frequency and time domain measurement of through-silicon via (TSV) failure","authors":"D. Jung, Joohee Kim, Heegon Kim, J. J. Kim, Joungho Kim, J. Pak, J. Yook, J. C. Kim","doi":"10.1109/EPEPS.2012.6457909","DOIUrl":null,"url":null,"abstract":"As a solution to limitlessly growing demand on miniaturization of electronic devices, through silicon via (TSV) based 3-dimensional integrated circuits (3D-IC) have brought another era of technology evolution. However, one of the remaining challenges to overcome is to increase the reliability of the products. Due to the instability of TSV fabrication process, different types of failure may be caused, affecting the performance of 3D-IC. TSV test method is essential for TSV based 3D-IC to be integrated in the products. One of the main failure types is disconnection failure in the channel. The point of defect not only has to be detected, but also has to be localized, so that appropriate channel is chosen to go through the recovery process. By measuring the fabricated test vehicles in frequency and time domain, the location of disconnection along the channel can be detected. S11 and S22 magnitudes are measured for frequency domain analysis. The degrees of decrease in two plots are compared to test how far the signals from each port travel before detecting the disconnection. Applying the similar idea, time domain measurement is analyzed with time-domain reflectometry (TDR) waveforms. The TDR waveforms from port 1 and port 2 are compared by their rising times, which depend on parasitic shunt capacitances within the channel. The values may be quantified for more precise TSV testing.","PeriodicalId":188377,"journal":{"name":"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEPS.2012.6457909","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
As a solution to limitlessly growing demand on miniaturization of electronic devices, through silicon via (TSV) based 3-dimensional integrated circuits (3D-IC) have brought another era of technology evolution. However, one of the remaining challenges to overcome is to increase the reliability of the products. Due to the instability of TSV fabrication process, different types of failure may be caused, affecting the performance of 3D-IC. TSV test method is essential for TSV based 3D-IC to be integrated in the products. One of the main failure types is disconnection failure in the channel. The point of defect not only has to be detected, but also has to be localized, so that appropriate channel is chosen to go through the recovery process. By measuring the fabricated test vehicles in frequency and time domain, the location of disconnection along the channel can be detected. S11 and S22 magnitudes are measured for frequency domain analysis. The degrees of decrease in two plots are compared to test how far the signals from each port travel before detecting the disconnection. Applying the similar idea, time domain measurement is analyzed with time-domain reflectometry (TDR) waveforms. The TDR waveforms from port 1 and port 2 are compared by their rising times, which depend on parasitic shunt capacitances within the channel. The values may be quantified for more precise TSV testing.