{"title":"Investigation on the Vdd scaling limit of stochastic computing circuits based on FinFET technology","authors":"Xiaobo Jiang, Runsheng Wang, Shaofeng Guo, Ru Huang","doi":"10.23919/SNW.2017.8242341","DOIUrl":null,"url":null,"abstract":"The scaling limits of supply voltage (Vdd) in stochastic computing are investigated based on foundry-level 16/14nm FinFET technology, considering inherent, static and transient variations. Circuit functionality, EDP, arithmetic error are examined, indicating that transient variation induced arithmetic bias is the dominating factor.","PeriodicalId":424135,"journal":{"name":"2017 Silicon Nanoelectronics Workshop (SNW)","volume":"122 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Silicon Nanoelectronics Workshop (SNW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/SNW.2017.8242341","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The scaling limits of supply voltage (Vdd) in stochastic computing are investigated based on foundry-level 16/14nm FinFET technology, considering inherent, static and transient variations. Circuit functionality, EDP, arithmetic error are examined, indicating that transient variation induced arithmetic bias is the dominating factor.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
