Simulation And Modeling For High Level Design

Abstract

With the drive to ULSI design, the concept of design of the complete chip being done within a single design team is becoming rare. These large designs include large pieces of intellectual property (IP) from previous designs (design reuse) or imported from another company or design team (design core). To compound this, ULSI power budget targets are more difficult to meet than in the past when design complexity was less. In this session varying approaches to address these issues are discussed.