M. V. D. Brink, A. Yen, P. Wijnen, M. Lercel, B. Sluijk
{"title":"Holistic Patterning to Advance Semiconductor Manufacturing in the 2020s and Beyond","authors":"M. V. D. Brink, A. Yen, P. Wijnen, M. Lercel, B. Sluijk","doi":"10.1109/vlsitechnologyandcir46769.2022.9830360","DOIUrl":null,"url":null,"abstract":"Semiconductors have enabled ever-increasing efficiency in compute and storage of information, as a result of decades of cost-effective scaling of device density and generations of new device technologies. We believe that continued advances in holistic patterning will enable cost-effective scaling of semiconductor devices to continue throughout the 2020s and beyond. We present here key developments across ASML’s holistic product portfolio: the extreme ultraviolet (EUV) lithography roadmap with its 0.33 numerical-aperture (NA) platform and the next-generation 0.55 NA (High-NA) platform, the deep ultraviolet (DUV) roadmap including cutting-edge immersion lithography and cost-efficient mature systems, and key innovations across our optical metrology, electron-beam metrology and inspection portfolio, and our computational lithographic technology. In high-volume manufacturing, the ultimate lithographic performance is only realized by the holistic combination of exposure systems, metrology and inspection tools, and computational-lithographic algorithms. This includes process window optimization during setup, accurate measurement of process capability, and active control to stay within the patterning process window.","PeriodicalId":332454,"journal":{"name":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830360","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Semiconductors have enabled ever-increasing efficiency in compute and storage of information, as a result of decades of cost-effective scaling of device density and generations of new device technologies. We believe that continued advances in holistic patterning will enable cost-effective scaling of semiconductor devices to continue throughout the 2020s and beyond. We present here key developments across ASML’s holistic product portfolio: the extreme ultraviolet (EUV) lithography roadmap with its 0.33 numerical-aperture (NA) platform and the next-generation 0.55 NA (High-NA) platform, the deep ultraviolet (DUV) roadmap including cutting-edge immersion lithography and cost-efficient mature systems, and key innovations across our optical metrology, electron-beam metrology and inspection portfolio, and our computational lithographic technology. In high-volume manufacturing, the ultimate lithographic performance is only realized by the holistic combination of exposure systems, metrology and inspection tools, and computational-lithographic algorithms. This includes process window optimization during setup, accurate measurement of process capability, and active control to stay within the patterning process window.