14nm Ferroelectric FinFET technology with steep subthreshold slope for ultra low power applications

Z. Krivokapic, U. Rana, R. Galatage, A. Razavieh, A. Aziz, J. Liu, J. Shi, H. Kim, R. Sporer, C. Serrao, A. Busquet, P. Polakowski, J. Müller, W. Kleemeier, A. Jacob, D. Brown, A. Knorr, R. Carter, S. Banna
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引用次数: 150

Abstract

Doped hafnia ferroelectric layers with thicknesses from 3 to 8nm are integrated into state-of-the-art 14nm FinFET technology without any further process modification. Ferroelectric devices show improved subthreshold slope (as low as 54mV/dec) and Idsat (up to 165% increase). C-V curves show slight ferroelectric hysteresis. For the first time, we show that ring oscillators with ferroelectric devices can operate at frequencies similar to regular dielectrics, while improved subthreshold slope reduces their active power. We also propose a model for ferroelectric MOSFETs that spans both negative (NCFET) and positive (PCFET) ferroelectric capacitance (CFE) devices. By carefully designed capacitance matching ferroelectric devices can provide significant power savings without sacrificing the speed.
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14nm铁电FinFET技术,具有陡峭的亚阈值斜率,适用于超低功耗应用
厚度从3到8nm的掺杂半氟铁电层被集成到最先进的14nm FinFET技术中,无需进一步的工艺修改。铁电器件显示出改善的亚阈值斜率(低至54mV/dec)和Idsat(高达165%)。C-V曲线显示出轻微的铁电滞后。我们首次证明了带有铁电器件的环形振荡器可以在与常规电介质相似的频率下工作,而改进的亚阈值斜率降低了它们的有功功率。我们还提出了一个铁电mosfet模型,该模型涵盖了负(NCFET)和正(PCFET)铁电电容(CFE)器件。通过精心设计电容匹配的铁电器件,可以在不牺牲速度的情况下显著节省功耗。
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