Hybrid-on-chip communication architecture for dynamic MP-SoC protection

Abstract

MPSoCs are able to support multiple applications on the same chip. This flexibility also represents a vulnerability, turning the MPSoC security specially challenging. Most of the current MPSoCs security services are based on symmetric and public-key cryptographic mechanisms. So that, MPSoCs integrate a large set of keys that must be exchanged in an efficient and secure way. In such scenario, any security concept will be ineffective if the key management is weak. In this paper, we present the implementation of an on-chip hybrid communication (HoCs) security-based architecture, that combines bus and Network-on-chip (NoC), to address the efficient and secure key management at MPSoCs. The HoC implements dynamically the QoSS (Quality of Security Service) concept that allows the customization of security. We evaluate the effectiveness of our approach over several MPSoCs attack scenarios and estimate their impact on the overall performance. We show that our architecture can perform a fast detection of a wide range of attacks and a fast configuration of the different security policies for several MPSoC applications. Our hybrid approach saves upto 16% and 25% of communication latency and power consumption, respectively, when compared to the NoC-based architecture without any security.