CMOS large signal model for CAD

Abstract

A compact large-signal model for high frequency CMOS transistors is proposed and experimentally evaluated with DC, S-parameter power spectrum measurements and load pull measurements. Very good correspondences between measurements on 100 nm CMOS FETs (f/sub T/ = 140 GHz, f/sub max/ =100 GHz) and simulations were achieved. Due to the low number of model parameters and the careful selection of model equations, the model exhibits excellent convergence behavior, a property important for successful nonlinear circuit simulation of RF circuits.