Simplified 3.3V tolerance circuit for 2.5V I/O design in PCI-X signaling environment

Abstract

A low voltage interface circuit with a high voltage tolerance enables devices with different power supply levels to be efficiently coupled together without significant leakage current or damage to the circuits. The interface circuit includes an impedance control circuit, an output buffer, an input buffer, an isolation circuit and a pull up protection circuit. When a high voltage is applied to the IO pad, the pull-up protection circuit drives the gate of the pull up transistor to the high IO pad voltage to ensure that no current flows to the positive supply voltage. Also the isolation circuit couples the high IO pad voltage to the body of the pull-up transistor to prevent leakage current through parasitic diodes formed by the pull-up transistor.