An AI-calibrated IF filter: a yield enhancement method with area and power dissipation reductions

M. Murakawa, T. Adachi, Yoshihiro Niino, Y. Kasai, E. Takahashi, K. Takasuka, T. Higuchi
{"title":"An AI-calibrated IF filter: a yield enhancement method with area and power dissipation reductions","authors":"M. Murakawa, T. Adachi, Yoshihiro Niino, Y. Kasai, E. Takahashi, K. Takasuka, T. Higuchi","doi":"10.1109/CICC.2002.1012837","DOIUrl":null,"url":null,"abstract":"We have developed an LSI for Gm-C IF filters, attaining (1) a 63% reduction in filter area, (2) a 38% reduction in power dissipation, compared to existing commercial products, and (3) a yield rate of 97%. The developed chip is calibrated within a few seconds by a genetic algorithm; an efficient AI technique for difficult optimization problems.","PeriodicalId":209025,"journal":{"name":"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"21","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2002.1012837","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 21

Abstract

We have developed an LSI for Gm-C IF filters, attaining (1) a 63% reduction in filter area, (2) a 38% reduction in power dissipation, compared to existing commercial products, and (3) a yield rate of 97%. The developed chip is calibrated within a few seconds by a genetic algorithm; an efficient AI technique for difficult optimization problems.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
人工智能校准的中频滤波器:一种面积和功耗降低的良率提高方法
我们开发了一种用于Gm-C中频滤波器的LSI,与现有的商业产品相比,实现了(1)滤波器面积减少63%,(2)功耗降低38%,(3)良率为97%。开发的芯片通过遗传算法在几秒钟内进行校准;一种解决复杂优化问题的高效人工智能技术。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A signal integrity-driven buffer insertion technique for post-routing noise and delay optimization Modularized low temperature LNO/PZT/LNO ferroelectric capacitor-over-interconnect (COI) FeRAM for advanced SOC (ASOC) application SOI Hall effect sensor operating up to 270/spl deg/C A 402-output TFT-LCD driver IC with power-controlling function by selecting number of colors Understanding MOSFET mismatch for analog design
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1