Test Chip Electrical Measurements with Model Correlation

Abstract

An integrated circuit device developed through a JEDEC standards committee with multiple, selectable, and controllable CMOS output drivers is installed in a complex plastic ball grid array package with multiple power and ground planes. A specialized circuit board is designed and used to mount the package and loads, to facilitate device control from an external signal source, and to provide output measurement ports. Measurements of simultaneous switching noise (SSN) are made under various conditions of the test chip operation, measurement points, and ground port configurations. The switching characteristics of the output drivers are shown to depend on the configuration of the package connections and the number of active outputs. Computer models of the system were generated and the data are compared to the measured values. Good correlation with models is observed to be highly dependant on using accurate driver switching characteristics.