Analysis of parasitic capacitance and performance in gate-ail-around and tri-gate channel vertical FET

Youngsoo Seo, Myounggon Kang, Hyungcheol Shin
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引用次数: 1

Abstract

The parasitic capacitances in Vertical FET(VFET) are investigated. Vertical device has additional parasitic capacitance compared with lateral device because of deeply contacted drain metal. This parasitic capacitance degrades the performance of the device. In this study, tri-gate channel VFET which eliminates the additional parasitic capacitance without broadening the device area is proposed.
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栅极环极和三栅极沟道垂直场效应管的寄生电容和性能分析
研究了垂直场效应管(VFET)的寄生电容。由于漏极金属的深度接触,垂直装置比横向装置具有额外的寄生电容。这种寄生电容会降低器件的性能。在这项研究中,提出了一种消除附加寄生电容而不扩大器件面积的三栅极沟道VFET。
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