P. Beshay, J. Bolus, T. Blalock, V. Chandra, B. Calhoun
{"title":"SRAM sense amplifier offset cancellation using BTI stress","authors":"P. Beshay, J. Bolus, T. Blalock, V. Chandra, B. Calhoun","doi":"10.1109/SUBVT.2012.6404299","DOIUrl":null,"url":null,"abstract":"Device variability in modern processes has become a major concern in SRAM design leading to degradation of both performance and yield. Variation induced offset in the sense amplifiers requires a larger bitline differential, which slows down SRAM access times. In this paper, we propose a post fabrication technique that takes advantage of the typically detrimental bias temperature instability (BTI) aging effect to improve SRAM sense amplifier offset.","PeriodicalId":383826,"journal":{"name":"2012 IEEE Subthreshold Microelectronics Conference (SubVT)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE Subthreshold Microelectronics Conference (SubVT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SUBVT.2012.6404299","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Device variability in modern processes has become a major concern in SRAM design leading to degradation of both performance and yield. Variation induced offset in the sense amplifiers requires a larger bitline differential, which slows down SRAM access times. In this paper, we propose a post fabrication technique that takes advantage of the typically detrimental bias temperature instability (BTI) aging effect to improve SRAM sense amplifier offset.