Triple Modular Sum Code as a New Code for the Tasks of Checkable Automation System Synthesis

D. Efanov
{"title":"Triple Modular Sum Code as a New Code for the Tasks of Checkable Automation System Synthesis","authors":"D. Efanov","doi":"10.1109/EWDTS.2018.8524659","DOIUrl":null,"url":null,"abstract":"The author developed a new method of building a code with sum of unit data bits. It was suggested to calculate modified weight of a data bit, when building a sum code. The latter was achieved by determining the least non-negative residue of its actual weight, by means of a predefined module. Then the obtained number was corrected using two correction factors, calculated as modulo two convolution of various subsets of data vector bits. The author called the new code a triple modular sum code. The triple modular code is compared to classical Berger code according to its redundancy. It should be mentioned that it has better characteristics of error detection in data vectors in comparison with Berger code. Triple modular sum codes extend the class of common codes with low redundancy. Their application can be justified by hardware costs on implementation of fault detection property in controlled discrete objects. In this case, it is possible to build a whole family of triple modular codes for one length value of a data vector, thus extending the prospects of their application in the process of building reliable and safe control components.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE East-West Design & Test Symposium (EWDTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EWDTS.2018.8524659","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

The author developed a new method of building a code with sum of unit data bits. It was suggested to calculate modified weight of a data bit, when building a sum code. The latter was achieved by determining the least non-negative residue of its actual weight, by means of a predefined module. Then the obtained number was corrected using two correction factors, calculated as modulo two convolution of various subsets of data vector bits. The author called the new code a triple modular sum code. The triple modular code is compared to classical Berger code according to its redundancy. It should be mentioned that it has better characteristics of error detection in data vectors in comparison with Berger code. Triple modular sum codes extend the class of common codes with low redundancy. Their application can be justified by hardware costs on implementation of fault detection property in controlled discrete objects. In this case, it is possible to build a whole family of triple modular codes for one length value of a data vector, thus extending the prospects of their application in the process of building reliable and safe control components.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
三模和码作为可查自动化系统综合任务的一种新码
作者提出了一种用单位数据位和构建代码的新方法。在构建求和代码时,建议计算数据位的修改权值。后者是通过确定其实际权重的最小非负残差,通过一个预定义的模块来实现的。然后使用两个校正因子对得到的数字进行校正,计算为数据矢量位的各个子集的模二次卷积。作者称新代码为三模和代码。根据三模码的冗余度与经典伯杰码进行了比较。值得一提的是,与Berger代码相比,它具有更好的数据向量错误检测特性。三模和码是对低冗余普通码的一种扩展。它们的应用可以通过硬件成本来证明在被控离散对象中实现故障检测特性是合理的。在这种情况下,可以为一个数据向量的一个长度值构建一个完整的三模码族,从而扩展了它们在构建可靠和安全的控制组件过程中的应用前景。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Evolution of a Problem of the Hidden Faults in the Digital Components of Safety-Related Systens Design and Test Issues of a SOl CMOS Voltage Controlled Oscillators for Radiation Tolerant Frequency Synthesizers Methods of EVM Measurement and Calibration Algorithms for Measuring Instruments Design of Two-Valued and Multivalued Current Digital Adders Based on the Mathematical Tool of Linear Algebra System of Designing Test Programs and Modeling of the Memory Microcircuits
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1