L. Czornomaz, N. Daix, E. Uccelli, D. Caimi, M. Sousa, C. Rossel, H. Siegwart, C. Marchiori, J. Fompeyrine
{"title":"Co-integrating high mobility channels for future CMOS, from substrate to circuits","authors":"L. Czornomaz, N. Daix, E. Uccelli, D. Caimi, M. Sousa, C. Rossel, H. Siegwart, C. Marchiori, J. Fompeyrine","doi":"10.1109/ICIPRM.2014.6880563","DOIUrl":null,"url":null,"abstract":"Direct wafer bonding can be a vehicle for the dense co-integration of co-planar nano-scaled SiGe p-FETs and InGaAs n-FETs. Like for SiGe, direct wafer bonding enable the fabrication of fully depleted transistors having superior electrostatic control over the channel. Hybrid substrates can be also fabricated by direct wafer bonding with stacked ultra-thin high-mobility layers. A process flow allows fabricating n- and p-channel field effect transistors with ultra-thin body and BOX on the same wafer. Working CMOS inverters are obtained using a common front-end.","PeriodicalId":181494,"journal":{"name":"26th International Conference on Indium Phosphide and Related Materials (IPRM)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"26th International Conference on Indium Phosphide and Related Materials (IPRM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICIPRM.2014.6880563","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Direct wafer bonding can be a vehicle for the dense co-integration of co-planar nano-scaled SiGe p-FETs and InGaAs n-FETs. Like for SiGe, direct wafer bonding enable the fabrication of fully depleted transistors having superior electrostatic control over the channel. Hybrid substrates can be also fabricated by direct wafer bonding with stacked ultra-thin high-mobility layers. A process flow allows fabricating n- and p-channel field effect transistors with ultra-thin body and BOX on the same wafer. Working CMOS inverters are obtained using a common front-end.