L. Huli, Kanzo Kato, Steven Gueci, N. Antonovich, Steven Grzeskowiak, D. Hetzer, E. Liu, Alexandra Krawicz, S. Shimura, S. Kawakami, Soichiro Okada, K. Petrillo, Luciana Meli, N. Latham, Y. Cabrera, Belle Antonovich
{"title":"Optimization of spin-on metal oxide resist performance via new development techniques on sub-30nm pitch patterning","authors":"L. Huli, Kanzo Kato, Steven Gueci, N. Antonovich, Steven Grzeskowiak, D. Hetzer, E. Liu, Alexandra Krawicz, S. Shimura, S. Kawakami, Soichiro Okada, K. Petrillo, Luciana Meli, N. Latham, Y. Cabrera, Belle Antonovich","doi":"10.1117/12.2658880","DOIUrl":null,"url":null,"abstract":"Extreme ultraviolet lithography (EUVL) has overcome significant challenges to become an essential enabler to the logic and memory scaling roadmap. Despite its significant progress, resist photo speed, and defectivity remains the main concerns for high-volume manufacturing. To overcome these issues, high-performance EUV resist processes are needed. The high-performance resist process must simultaneously meet multiple requirements, such as a high resolution, high sensitivity, low roughness, low defect level, and good global CD uniformity (CDU). One of the high-performance resist candidates for future EUV scaling, and high NA EUV is Metal Oxide Resist (MOR). In our work, we introduce the new coater/developer hardware and new resist development techniques to improve photo speed, defectivity, and CDU without degradation of roughness in MOR. We will show that the new development methods significantly improve EUV dose to size (DtS) and micro-bridge (MB) while maintaining resist roughness performance post litho and post-etch. The new coater/developer hardware and processes are evaluated through a robust characterization methodology that includes an understanding of the defect modes at ADI (after development inspection) and AEI (after etch inspection), as well its ultimate correlation to electrical yield.","PeriodicalId":212235,"journal":{"name":"Advanced Lithography","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Advanced Lithography","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1117/12.2658880","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Extreme ultraviolet lithography (EUVL) has overcome significant challenges to become an essential enabler to the logic and memory scaling roadmap. Despite its significant progress, resist photo speed, and defectivity remains the main concerns for high-volume manufacturing. To overcome these issues, high-performance EUV resist processes are needed. The high-performance resist process must simultaneously meet multiple requirements, such as a high resolution, high sensitivity, low roughness, low defect level, and good global CD uniformity (CDU). One of the high-performance resist candidates for future EUV scaling, and high NA EUV is Metal Oxide Resist (MOR). In our work, we introduce the new coater/developer hardware and new resist development techniques to improve photo speed, defectivity, and CDU without degradation of roughness in MOR. We will show that the new development methods significantly improve EUV dose to size (DtS) and micro-bridge (MB) while maintaining resist roughness performance post litho and post-etch. The new coater/developer hardware and processes are evaluated through a robust characterization methodology that includes an understanding of the defect modes at ADI (after development inspection) and AEI (after etch inspection), as well its ultimate correlation to electrical yield.