{"title":"Deep sub-micron CMOS device design for low power analog applications","authors":"H. Deshpande, B. Cheng, J. Woo","doi":"10.1109/VLSIT.2001.934960","DOIUrl":null,"url":null,"abstract":"Signal swing, power and device performance requirements for analog applications result in trade-offs for scaled MOSFET design. This paper presents a comprehensive study on optimization of deep sub-micron NMOS device for low power analog applications. It is shown that novel channel engineering is essential along with thin gate oxides and shallow junctions for improving the device analog performance.","PeriodicalId":232773,"journal":{"name":"2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2001.934960","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
Signal swing, power and device performance requirements for analog applications result in trade-offs for scaled MOSFET design. This paper presents a comprehensive study on optimization of deep sub-micron NMOS device for low power analog applications. It is shown that novel channel engineering is essential along with thin gate oxides and shallow junctions for improving the device analog performance.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
