D. Gevaert, J. Vanneuville, J. Nedved, J. Sevenhans
{"title":"Switched current sigma-delta A/D converter for a CMOS subscriber line analog front end","authors":"D. Gevaert, J. Vanneuville, J. Nedved, J. Sevenhans","doi":"10.1109/EDTC.1994.326895","DOIUrl":null,"url":null,"abstract":"This paper describes the design and testing of a 1-bit A/D converter based on the sigma-delta modulation principle. Unlike the conventional realisations using the switched capacitor approach, the current switching technique uses the current level as a variable. In order to check the feasibility and advantages of this technique, a first order 1-bit A/D converter and a second order 1-bit A/D converter were designed. In the first order 1-bit A/D converter a time-continuous current-integrator is used as filter. The circuit has been designed realised and tested. In the second order 1-bit A/D converter the filter is based on the analog sampling and processing of a current signal. The second order filter is implemented with class AB switched current memory cells. The design has been simulated and processed in ES2 1.5 /spl mu/m CMOS technology.<<ETX>>","PeriodicalId":244297,"journal":{"name":"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDTC.1994.326895","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper describes the design and testing of a 1-bit A/D converter based on the sigma-delta modulation principle. Unlike the conventional realisations using the switched capacitor approach, the current switching technique uses the current level as a variable. In order to check the feasibility and advantages of this technique, a first order 1-bit A/D converter and a second order 1-bit A/D converter were designed. In the first order 1-bit A/D converter a time-continuous current-integrator is used as filter. The circuit has been designed realised and tested. In the second order 1-bit A/D converter the filter is based on the analog sampling and processing of a current signal. The second order filter is implemented with class AB switched current memory cells. The design has been simulated and processed in ES2 1.5 /spl mu/m CMOS technology.<>