{"title":"Parallel interference cancellation for DS/CDMA downlink with low spreading factors","authors":"I. Krikidis","doi":"10.1109/SIPS.2005.1579955","DOIUrl":null,"url":null,"abstract":"Parallel interference cancellation (PIC) refers to a family of low-complexity multi-user detection methods for the uplink of direct-sequence code-division multiple-access (DS/CDMA) systems. Recently, it has been viable for the downlink and terminal implementations. The PIC schemes using as \"infected\" signal the correlation input have a simpler structure, but perform poorly when the spreading factor (SF) is low. In this paper we propose a new PIC scheme which, besides multiple access interference (MAI) suppression to the correlation input performs also inter-path interference (IPI) mitigation to the correlation output. Numerical results for a downlink DS/CDMA system show that the proposed multistage detector optimizes jointly performance and computational power. It approximates the performance of a conventional PIC, suppressing the interference to the correlation output, but it has lower computational complexity. In the same time, the computational similarities and the iterative nature of the different sub-algorithms of the proposed PIC scheme make possible the design of a simple reconfigurable architecture which minimizes the area overhead and the power consumption. These properties are suitable for terminal implementations where the computational power is more critical than for the base stations (BSs).","PeriodicalId":436123,"journal":{"name":"IEEE Workshop on Signal Processing Systems Design and Implementation, 2005.","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Workshop on Signal Processing Systems Design and Implementation, 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIPS.2005.1579955","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
Parallel interference cancellation (PIC) refers to a family of low-complexity multi-user detection methods for the uplink of direct-sequence code-division multiple-access (DS/CDMA) systems. Recently, it has been viable for the downlink and terminal implementations. The PIC schemes using as "infected" signal the correlation input have a simpler structure, but perform poorly when the spreading factor (SF) is low. In this paper we propose a new PIC scheme which, besides multiple access interference (MAI) suppression to the correlation input performs also inter-path interference (IPI) mitigation to the correlation output. Numerical results for a downlink DS/CDMA system show that the proposed multistage detector optimizes jointly performance and computational power. It approximates the performance of a conventional PIC, suppressing the interference to the correlation output, but it has lower computational complexity. In the same time, the computational similarities and the iterative nature of the different sub-algorithms of the proposed PIC scheme make possible the design of a simple reconfigurable architecture which minimizes the area overhead and the power consumption. These properties are suitable for terminal implementations where the computational power is more critical than for the base stations (BSs).