On-die droop detector for analog sensing of power supply noise

2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408) Pub Date : 2004-03-30 DOI:10.1109/JSSC.2004.825120

A. Muhtaroğlu, G. Taylor, T. Rahal-Arabi

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引用次数: 120

Abstract

Understanding the supply fluctuations of various frequency harmonics is essential to maximizing microprocessor performance. Conventional methods used for analog validation of the power delivery system fall short in one or more of: a) Measurement accuracy in both frequency and time domains, especially for very high frequency noise caused by large di/dt events. The multi-GHz power supply noise attenuates very quickly away from the die. Conventional approaches of measuring the noise at the pins of the package or at the die using capacitive probes are not accurate for multi-GHz clocks. For this reason, the observability of high frequency on die noise has been very tricky. b) Implementation, e.g. delivery of analog references to multiple areas across a "noisy" die, and compactness/modularity of the measurement units. c) Automation to enable a timely volume of measurements. The efficiency of the measurements is key to correlating a particular speed path to poser supply noise. To address the above issues this paper presents an On-Die Droop Detector (ODDD), a scaleable IC solution implemented and validated on a 90 nm process, for analog sensing of differential high bandwidth supply noise.

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用于模拟电源噪声的模上下垂检测器

了解各种频率谐波的电源波动对于最大化微处理器性能至关重要。用于电力输送系统模拟验证的传统方法在以下一个或多个方面存在不足:a)频率和时间域的测量精度，特别是对于由大di/dt事件引起的高频噪声。多ghz电源噪声在远离芯片的地方衰减得非常快。使用电容探头测量封装引脚或芯片处的噪声的传统方法对于多ghz时钟是不准确的。因此，高频模上噪声的可观测性是一个非常棘手的问题。b)实现，例如通过“噪声”模具向多个区域提供模拟参考，以及测量单元的紧凑性/模块化。c)自动化以实现及时的测量量。测量的效率是将特定速度路径与电源噪声相关联的关键。为了解决上述问题，本文提出了一种片上下垂检测器(ODDD)，这是一种可扩展的IC解决方案，在90 nm工艺上实现并验证，用于模拟感知差分高带宽电源噪声。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408)

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